Recipe for Winning Chip Battles

I will admit, I do get razzed (especially from within Sun) for writing so much about software. So in order to change stripe for a moment, I thought I’d put together some thoughts on Sun’s position in the chip business, relative to both IBM and Intel. Here’s my view of how to win a microprocessor battle.


Step 1. Make absolutely sure you have a volume operating system, and tons of ISV’s. (And there you were thinking I was going to focus on hardware.)


Step 2. Have the fastest chip on earth.


Yes, the ordering is deliberate, and yes, my view is that software generally, and operating systems specifically, are the primary differentiator in microprocessor battles. Here are a few examples.


If you don’t have a fast chip, but you have a volume operating system, time’s your enemy – but you’ll live to fight another day. Witness the enduring value of Intel’s Xeon platform, which despite AMD Opteron’s widening performance lead over Intel, has a legacy of support from Microsoft Windows (and Red Hat and Solaris) to carry it long into the future. It’ll likely lose share between now and 2009, but it’s certainly still in the game.


Let’s look at the opposite scenario. Imagine you don’t have a volume operating system, but you have a fast chip. In my view, that fight is futile. There are innumerable examples from history – the most famous, of course, being Digital Equipment Corporation’s (now HP’s) Alpha. Which despite blowing everyone away with performance (in its day), lacked either a volume OS or support from independent software vendors (ISV’s). It died a lingering death. Intel’s Itanium, which lacks a volume OS and ISV portfolio (and no, saying “Linux” doesn’t count, you need a branded product name and version to which an ISV can qualify), is on this path.


So now, let me fall on my sword about Sun’s microprocessor roadmap for the past few years. Unlike the late 90’s, where Sun had a commanding performance lead, starting in early 2001, we couldn’t claim we were satisfying step 2 of the two steps above – for many tasks, our older UltraSPARC chips weren’t faster than IBM’s Power5 (or Intel’s Xeon). Luckily, we had an extraordinarily high volume operating system in Solaris, along with a big community of ISV’s and software supporters who filled in our gaps. Yes, we lost share, but we still ship billions in servers a year.


The saving grace for Sun was that customers could run Solaris on x86 and x64 platforms. (In fact, I was with a big bank yesterday doing a very cool deployment of Solaris on Dell systems). Customers have a choice. Proving we encourage the choice, during that period, we added AMD’s Opteron to our product family (read THIS!), and are now among the fastest growing x86/64 vendors out there (we’ve gone from something like 99th in the market, to being the 6th largest vendor, with #4 in our crosshairs). Customers also found the transition to Red Hat Linux to be an option – which thankfully kept them on Unix, and is now simplifying the transition back to Solaris.


But IBM’s recent Power5+ announcement was odd – in that what we were expecting wasn’t what IBM delivered.


Granted, I didn’t get invited to IBM’s P5+ roll-out. I was expecting yet another of IBM’s periodic, methodical improvements. Something similar to the 2002 upgrade from POWER4 to POWER4+ – in which they executed flawlessly to increase speed, lower cost and power consumption. They did everything they could to make the chip work better at less cost. And that’s what initiated a very tough period for Sun.


But the newly announced POWER5+ seemed anti-climactic – no higher frequencies. No improvements to memory. Not even a reduction in power consumption (making the POWER name, with oil at $70/barrel, particularly ironic). About the only tangible benefit listed for POWER5+ over POWER5 was a smaller die size – a manufacturing benefit for IBM.


The new POWER5+ is sitting today at the exact same performance point that the old POWER5 reached over a year ago. IBM has stood still – long enough to open a window of opportunity for Sun.


A few weeks before the P5+ announcement, we announced our own upgrade to our UltraSPARC IV processor. The new UltraSPARC IV+ is a completely revised design, which boasts a doubling of performance, a smaller die and lower power consumption. And unlike IBM, which is confining P5+ to a few of its low-end systems, we already have UltraSPARC IV+ rolled out across our entire line of mid-range and high-end servers.


And we’re just getting going.


Real soon now (we’ve said January, but there is that holiday rush to think about), we’ll be introducing our new Niagara-based product line. As I discussed a while back, Niagara is our internal code name for a radical shift in computing, and a redesign of SPARC. Niagara systems take the concept of dual core processors (with which most of you are familiar), and goes to an absolute extreme – building 8 cores, each capable of running 4 jobs simultaneously (4 threads), onto a single chip. Doing the math, we’ll be delivering a 32-way chip, running 9.6GHz, which sips power (about 70 watts). On performance-per-watt metrics, we believe we’ll be a factor of 5 better than what IBM just announced. A factor of 5.


The chip is built for Solaris, and built for the internet – for jobs like searching, web serving, video streaming or ripping through database transactions (we will be admittedly weak for bomb simulation). Niagara will run existing Solaris apps without recompilation – offering complete binary compatibility for the massive SPARC installed base, and a simple recompile to move from x64 (or vice versa). There will be nothing like it in the industry – and its arrival will give us the two strongest industry standard server lineups the market’s ever seen.


But these things tend to go in 5 year cycles. Where we led in the late 90’s, IBM exploited our weakness to lead until this year. And in short, the environment’s right for another shift. SPARC was part of the first wave of RISC processors that dominated high-performance computing in the mid- and late-80’s. In 1990, IBM introduced POWER, dominating until we introduced the first generation of our 64-bit UltraSPARC processors in 1995. Which dominated until IBM introduced their totally redesigned dual-core POWER4 in 2001, which dominated until this year. Now it looks like the pendulum is swinging back in our, and AMD’s, favor – for a while.


Add in what Intel announced a few weeks back, with analysts predicting no recovery until 2009, and it appears SPARC and Opteron are set to lead the pack on 64-bit performance, on volume operating systems, and on giving customers the choice they want – until well into the future.


But returning to Step 1 above, the key trend to watch is Solaris’s volume – as we transition from a company in which SPARC drives Solaris adoption, to one in which Solaris drives systems opportunity (x64 or SPARC). With Solaris blowing past 3.2 million licenses downloaded this week, 80% downloaded to non-Sun hardware, it’s now effectively fueling awareness and demand.


And given those numbers, it’s obviously helping out Intel’s Xeon, too.


Now, about running it on POWER5+…

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